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求翻译 英语专业的翻译

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求翻译 英语专业的翻译
延时相关模块的设计如图3所示,接收数据经过经过数据分路模块分为DateA和DateB两路数据,两路数据分别进入延时相关模块存入预先设置的缓存A和B中.其中缓存A和B分为实部和虚部两部分,经过缓存后的数据为4路实部与虚部数据,下一步对其进行相乘运算.
求翻译 英语专业的翻译
人工翻译,可放心采纳.
The design of delay related module is as shown in Figure 3, the received data are divided into two channels of data, Data A and Data B, througn the delay related module, and then these two channels of data are entered into the cache A and B of delay related module, respectively, which the pre-setting is stored in. Wherein both cache A and B are divided into two parts, the real part and imaginary part, after the data cache the data become 4 channels of real part and imaginary part data. Then thaes data are carried out multiplication operation