quartusII 运行报错(1)Error (10500):VHDL syntax error at vga.vhd(
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quartusII 运行报错(1)Error (10500):VHDL syntax error at vga.vhd(2) near text "use"; expecting "
程序如下
LIBRARY IEEE
use IEEE.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGINED.ALL;
entity vga640480 is
\x05port (\x05clk\x05:in STD_LOGIC;
\x05\x05hs,\x05vs,\x05r,g,b \x05:out STD_LOGIC;
\x05\x05rgbin :in std_logic_vector(2 downto 0);
\x05\x05hcntout,vcntout\x05:out std_logic_vector(9 downto 0)\x05);
end vga640480;
architecture ONE of vga640480 is
signal hcnt,vcnt\x05:std_logic_vector(9 downto 0);
begin
hcntout
程序如下
LIBRARY IEEE
use IEEE.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGINED.ALL;
entity vga640480 is
\x05port (\x05clk\x05:in STD_LOGIC;
\x05\x05hs,\x05vs,\x05r,g,b \x05:out STD_LOGIC;
\x05\x05rgbin :in std_logic_vector(2 downto 0);
\x05\x05hcntout,vcntout\x05:out std_logic_vector(9 downto 0)\x05);
end vga640480;
architecture ONE of vga640480 is
signal hcnt,vcnt\x05:std_logic_vector(9 downto 0);
begin
hcntout
LIBRARY IEEE后面要加“;”,STD_LOGIC_UNSIGINED要小写,就OK了.希望对你有所帮助.
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